SoCs used for home appliances represented by digital audio visual (AV) devices have advantages of not only realizing cost reductions by reducing the number of chips through integration of multiple functions onto one chip, but also realizing improvements in overall system performance by including newly-created system control architectures and bus architectures.
On the other hand, SoCs have a disadvantage that it is difficult to evaluate system performance of a SoC using an actual object, since an on-chip bus is hidden inside the SoC.
To address this disadvantage, there is a method of evaluating system performance of a SoC by outputting signals on an on-chip bus inside the SoC to the outside and observing the signals on the on-chip bus outside (e.g. Japanese patent application publication No. 2002-149442, published on May 24, 2002).
However, this method is problematic in that, if the on-chip bus inside the SoC is speeded up, development man-hours and difficulty of suppressing wiring variations inside the SoC increase significantly, and the number of signal lines of signals to be output to the outside becomes too large to secure necessary output terminals.
In view of this, there is another method that, instead of observing the signals themselves on the on-chip bus inside the SoC, observes occurrences of an event under a specific condition of a bus transaction, updates a counter value of a counter equipped in the SoC using pulse signals showing the event occurrences to thereby obtain event occurrence count information, outputs the event occurrence count information to outside the SoC, and evaluates the system performance of the SoC based on the output event occurrence count information (e.g. Japanese patent No. 3158425, published on Feb. 16, 2001).